Note: The slides shown in class had incorrect values for the 32-bit maximum & minimum values. These have been corrected in the electronic version here.
The slides used in lecture had the simulation results shown blank so that I could fill them in. If you want to look at the final results, they are available separately PDF, PPT.
- The original slides shown in class had a bug in the blocked-matrix multiply code. This has been corrected. Interestingly, this bug appears in the graduate Hennessy & Patterson computer architecture text, from which this code was extracted.
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I have added two slides showing the performance of matrix multiplication on the Alpha 21164s that we're using for this class. Interesting features are:
- I had to crank the matrix sizes up to 500 X 500 to get really bad (out of cache) performance.
- The numbers are about an order of
magnitude better than the SPARC20. The following shows the unblocked
performance:
- The actual block matrix code
shown in the notes didn't run very well. I had to tweak the loops to
get rid of the "max" operation. As an example, the code for the bijk is available online. The following is the resulting performance:
