15-740 Fall '97
Course Readings

• On reserve in the E&S Library (ask at desk).
• From the course secretary (please return promptly).
• From the course instructor

• [Blelloch96] Blelloch, G. E., ``Programming Parallel Algorithms,'' Communications of the ACM, March, 1996.
  • Postscript.
  • Online version
• [Clarke+92] Clarke, E.M., et al, ``Verification of the Futurebus+ Cache Coherence Protocol,'' Technical Report CMU-CS-92-206, 1992.
  • Postscript.
• [Comer] Comer, D. E., Internetworking with TCP/IP Volume 1: Principles, Protocols, and Architecture, Third Edition, Prentice Hall, 1995.
• [Dally] Dally, W. J., ``Network and Processor Architectures for Message-Driven Computers,'' VLSI and Parallel Computation, Suaya, R., and Birtwistle, G., eds., Morgan Kaufmann, 1990, Chapter 3.1, pp.140--169.
• [Gwennap] Gwennap, L., ``Digital 21264 Sets New Standard,'' Microprocessor Report, October 28, 1996.
  • Adobe acrobat
  • Postscript
• [Kane] Kane, G., and Heinrich, J., MIPS RISC Architecture, Prentice-Hall, 1992. On reserve in E&S Library.

  Note: Much of this material is covered the following document retrieved from the MIPS WWW site. It describes 4 generations of the instruction set definition, labeled I through IV. For this course, we will stick with the original (MIPS I) version:

  • Adobe acrobat
  • Postscript
• [Leighton] Leighton, T., ``Methods for Message Routing in Parallel Machines,'' 24th ACM Symposium on Theory of Computing (STOC '92), May, 1992, pp.77--96.
• [Smith91] Smith, J. R., and Taylor, W. R., ``Accurate Modeling of Interconnection Networks in Vector Supercomputers,'' 1991 International Conference on Supercomputing, ACM, 1991, pp.264--272.
• [Sunderam+94] Sunderam, V. S., Geist, G. A., Dongarra, J., and Manchek, R., ``The PVM Concurrent Computing System: Evolution, Experiences, and Trends,''
  • Postscript.