JUAN JOSÉ MATA
School Address:
SMC 4254
PO Box 3015
Pittsburgh, Pennsylvania 15230-3015
USA
1 (412) 862-2769
 Permanent Address:
P. O. Box 490
45080 Toledo
Spain
34 (25) 353-096
Internet: mata+@cmu.edu
http://www.cs.cmu.edu/~mata
GOAL To work in an engineering/computing-related position for a company that can benefit from my experience, knowledge and enthusiasm. Special interest in telecommunication networks and computer architecture.
EDUCATION Carnegie Mellon University, Pittsburgh, PA. M.S. expected May 96
Double major: Electrical & Computer Engineering, Computer Science
QPA of 3.25/4.00
Educational goal: Master in Business Administration.
Relevant coursework: Semiconductor Devices, Analysis and Design of Digital Ckts., Operating Systems, Concurrent and Real-Time Systems, Algorithms, Fundamentals of Communication Systems, Software Engineering, Superscalar Processor Design, Distributed Systems, Digital Communication and Signal Processing Systems Design, Circuit Switching and Packet Switching, Models of Software Sys.
Academic Honors: Dean's List.
WORK Software Engineering Teaching Assistant, Carnegie Mellon Fall 95
TA for the Computer Science Dept. 400-level project class with a real-world client.
Oracle Corporation Summer Intern Summer 95
Re-engineered a system for the Government Group to take advantage of the Oracle7 RDBMS and the new client/server development tools.
Design of an OLAP system to allow for analysis of historical sales data.
Santander Investment Summer Intern Summer 94
Application development in the Information Systems Dept. of an Investment Bank.
. Computing Skills Workshop Head Instructor, Carnegie Mellon Fall 93 - present In charge of a staff of 36 instructors. Project leader for the development of the course's WWW system. PAGE Summer Intern Summer 93 Worked in an ESPRIT project with the DSP Dept. that built an echo canceller.
SKILLS LANGUAGES: fluent in Spanish and French. COMPUTERS / ENGINEERING: Systems: DOS, UNIX, Macintosh. Languages: C/C++, Visual BASIC, Visual C++, PL/SQL, Cobol, Pascal, Verilog, Scheme, and Assembly (MIPS, MC68k). Applications: MATLAB, Cadence, Spice, Oracle7, Lotus Notes, FrameMaker and knowledge of multiple commercial packages. Projects: hardware implementation of a microprocessor using TTL, PAL/PLA and FPGA parts. Full design from ISA to actual datapath/controlpath. Designed, implemented at transistor layout level and verified a microprocessor datapath in 2 micron CMOS technology. Designed and implemented at schematic level a pipelined controlpath to work in conjunction with the MIPS R2000 datapath (done in Cadence). Coded a simple Unix kernel and associated file system for a MIPS emulator. Participant in the Electronics Group of the Wearable Computers Group, Engineering Design Research Center at Carnegie Mellon.
ACTIVITIES Officer of the IEEE Carnegie Mellon University Student Chapter for 2 yrs. (Treasurer, V. P.) Spanish Language Interest House Representative. Soccer, basketball, tennis.