Abstract: PHYs (devices that implement the physical transport layer of a communication system) present some interesting problems from both design and verification perspectives. A PHY combines digital control and high-precision analog circuits to manage low-level link characteristics such as drive strength, clock phase, termination impedance and line equalization. These combinations of digital and analog components, synthesis and hand crafting, and their interactions are not well addressed by existing flows and tools, either commercial or academic. In this talk, we'll cover some of the reasons that these problems exist and why they are becoming more common. We'll illustrate some of the work we are doing to address these issues, covering topics spanning analog and system modeling, verification tools and circuit design approaches. We'lll hint at a radically different design flow that we believe will work in the "Real World".

Dr. Kevin D. Jones is an Engineering Director at Rambus Inc, Los Altos, CA. He holds a Ph.D. in Computing Science from the University of Manchester, a M.Sc. in Computation from Oxford University and a B.Sc. in Computer Science from the University of Reading. Dr. Jones' areas of interest cover practical and theoretical approaches to design and verification of digital and analog circuits and systems. Prior to joining Rambus, he was a member of Research Staff at DEC's System Research Center, working in the area of formal methods. Previously, he had been a member of both academic and industrial research groups in the UK, working in the areas of formal specification and verification. For the last 12 years at Rambus, he has been working on, and leading groups working on, practical verification for high speed digital/analog designs. He is currently leading a technology development team focusing on novel design and verification tools and methods for this class of designs.