Abstract: An essential aspect of a high-quality manufacturing and design process is the development of test patterns, or sets of test inputs, which can be applied to the final product or intermediate instantiations in order to identify faults and distinguish correct system behavior from incorrect. Automatic test vector generation is well established for discrete state systems and systematic test methodologies for digital integrated circuits have been investigated and developed for more than three decades. Despite this, analogous methods for mixed-signal integrated circuits (ICs) and systems have remained elusive due to the hybrid nature of the controller/plant pair which may contain both switching logic and traditional continuous dynamic components.

In this presentation, we will first give a short overview of test vector generation, its use in industry and its relationship to formal verification. We then present a global search routine based on a genetic algorithm that produces test vectors for hybrid system models in Matlab/Simulink/Stateflow.