The format of a prefetch instruction resembles that of a normal load
instruction, except that there is no need to specify a destination
register. Therefore addressing modes that are appropriate for normal loads
are also appropriate for prefetches. The addressing mode used in these
experiments was ``base-plus-offset'', as shown in Figure
. This addressing mode is attractive because prefetch
address can typically be generated by using the same base register as the
load or store being prefetched and simply adjusting the constant offset to
reflect the software pipelining distance. An example of this is shown in
Figure , where the prefetch instruction is fetching
data five iterations ahead of the load instruction, and both instructions
use the same base register (r7). This is important in order to avoid
spilling registers once prefetches are inserted.
Addressing modes which cannot take
advantage of such register reuse should be avoided.
