Carnegie Mellon University researchers in the School of Computer Science collaborated with colleagues at Intel, Microsoft and New York University to develop a new system for internet servers that changes how CPUs communicate with network interface cards. The system, called Ensō, increases the rate at which servers can service requests by up to 600%.

Ensō received the Jay Lepreau Best Paper award at the USENIX Symposium on Operating Systems Design and Implementation last month in Boston. The research also received the Distinguished Artifact Award, recognizing the high quality of Ensō's open-source code. This marks the first time a single paper has received both awards.

Internet servers can receive hundreds of millions of packets per second from clients requesting data and services over the network. To keep up with these requests, developers increasingly turn to smart network interface cards (SmartNICs), which preprocess data as it arrives from the network before passing it to the CPU for processing.

"When you receive a bunch of letters, it is faster to read through them if someone has opened all of the envelopes and sorted the letters for you first," said Hugo Sadok, a Ph.D. student in the Computer Science Department (CSD) and Ensō's lead researcher.

Sadok and his colleagues noticed that even with the help of these devices, servers often lagged when responding to requests. They pinpointed the problem to the interface between the SmartNIC hardware and the CPU software. Although SmartNICs were figuratively opening the letters for the CPU, the software interface that allows the CPU to access data arriving from the network hardware still assumed that it was in envelopes — or packetized.

"The interface between networking hardware and software has remained relatively unchanged since the 1990s, even though what network cards do for us has changed a lot," said Justine Sherry, an associate professor in CSD and Sadok's doctoral advisor. "Ensō provides a more flexible API, which is not only more useful as SmartNICs become more sophisticated, but also provides exciting efficiency gains. This allows a server to process more data without costing more money or using additional energy."

The Ensō project was sponsored by the Intel/VMware Crossroads 3D FPGA Academic Research Center, a multiuniversity research center housed at CMU.

"Intel offers a diverse range of SmartNIC and infrastructure processing unit (IPU) options. Performance, cost, energy and ease-of-use are important. Ensō's design is a promising direction that inspires further exploration toward enhancing communication efficiency between input/output and host for connected systems." said Ren Wang, Ensō co-author and Intel research scientist.

To learn more about this research, the code and research paper are available on the project's website.