Nishant Sinha

Electrical and Computer Engineering
Carnegie Mellon University

off: 3703 Wean Hall, 5000 Forbes Ave, Pittsburgh PA 15213.
ph: 412-268-1718
nishant at cmu edu

Publications: DBLP

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(conferences, workshops, etc.)

[Thesis] (pdf) Automated Compositional Analysis for Checking Component Substitutability, Nishant Sinha.
[CAV'07] SAT-based Compositional Verification using Lazy Learning, Nishant Sinha, Edmund Clarke. Tech Report.
[SSS'06] Compositional Verification for System-on-Chip Designs, Nishant Sinha, Edmund Clarke, SRC Student Symposium, 2006. Best Paper in Session Award.
[FMCAD'06] ) (pdf) Assume-Guarantee Reasoning for Deadlock, Sagar Chaki, Nishant Sinha, In Proc. of Formal Methods in Computer Aided Design (FMCAD), 2006.
[CAV'06] (ps) (pdf) Symbolic Model Checking of Concurrent Programs using Partial Orders and On-the-fly Transactions, Vineet Kahlon, Aarti Gupta, Nishant Sinha, In Proc. of 18th International Conference on Computer Aided Verification, 2006.
[FMCO'05] (ps)( pdf) Program Compatibility Approaches, Edmund Clarke, Natasha Sharygina, Nishant Sinha, In Proc.of Formal Methods for Components and Objects (FMCO), 2005. (Tutorial Paper).
[FM'05] (ps) (pdf) Dynamic Component Substitutability Analysis, Sagar Chaki, Edmund Clarke, Natasha Sharygina, Nishant Sinha, In Proc. of International Conference on Formal Methods (FM), 2005. 31 papers accepted out of 129.
[CAV'05] (ps) (pdf) Automated Assume-Guarantee Reasoning for Simulation Conformance, Sagar Chaki, Edmund Clarke, Nishant Sinha, Prasanna Thati, In Proc. of 17th International Conference on Computer Aided Verification, 2005. 32 papers accepted out of 125.
[IFM'04] (ps) (pdf) State/Event-based Software Model Checking, Sagar Chaki, Edmund Clarke, Joel Ouaknine, Natasha Sharygina, Nishant Sinha, In Proc. of Fourth International Conference on Integrated Formal Methods (IFM) 2004, LNCS 2999, pages 128-147. This is a revised and extended version of our workshop publication with the same title described below.
[CAV'04] (ps) (pdf) Range Allocation for Separation Logic, Muralidhar Talupur, Nishant Sinha, Ofer Strichman, Amir Pnueli, In Proc. of 16th International Conference on Computer Aided Verification 2004, LNCS, pages 148-161. 33 papers accepted out of 142.

[SAVCBS'04] (ps) (pdf) Verification of Evolving Software, Sagar Chaki, Natasha Sharygina,Nishant Sinha, In Proc. of the 3rd International Workshop on Specification and Verification of Component-based Systems (SAVCBS) 2004.
[SoftMC'03] (ps) (pdf) Symbolic Model Checking of Software, Flavio Lerda, Nishant Sinha, Michael Theobald, In Proc. of SoftMC 2003,ENTCS 89(3).
[ST.EVE'03] (ps) (pdf) State/Event-based Software Model Checking, Workshop on State-oriented vs. Event-oriented thinking in Requirements Analysis, Formal Specification and Software Engineering (ST.EVE) 2003, Sagar Chaki, Joel Ouaknine, Natasha Sharygina, Nishant Sinha.

[TN-SEI] (html) A Basis for Composition Language CL, James Ivers, Nishant Sinha, Kurt Walnau, Technical Note, CMU/SEI-2002-TN-026.
[ASP-DAC'02] (pdf) Synthesis of High Performance Low Power Dynamic CMOS Circuits, Debasis Samanta, Ajit Pal, Nishant Sinha, In Proc. of ASP-DAC 2002, pages 99-104.
[ITCOM'01] (pdf) Real Time Performance Modeling of (3G) UMTS System, R. Badrinath, Niloy Mukherjee, Nishant Sinha, In Proc. of SPIE ITCOM 2001.

(journals)

[FACJ'05] (ps) (pdf) Concurrent Software Verification with States, Events, and Deadlocks, Sagar Chaki, Edmund Clarke, Joel Ouaknine, Natasha Sharygina, Nishant Sinha, Journal on Formal Aspects of Computing.