Researchers in Computer Architecture and Compilers

Explanation. This page is incomplete; please send corrections and additions to mihaib+who@cs.cmu.edu.
This page does not list students.

Name	Address	Picture	Work
F
Goto: all A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Manuel A. Fähndrich	Microsoft Research research.microsoft.com/~maf		static program analysis, type systems, novel programming languages, Fugue, Vault, BANE dblp
Michael Faiman	(deceased) U of Illinois at Urbana-Champaign, CS cs.uiuc.edu/people/faculty/faiman.html		computer architecture, computer networks, ILLIAC I & II, graphical processing, device theory, circuit design dblp
Babak Falsafi	Professor Carnegie Mellon U, ECE ece.cmu.edu/~babak		microarchitecture, multiprocessors, memory coherence dblp
Jesse Z. Fang	Director Intel MRL Programming Systems Lab intel.com/research/people/bios/fang_j.htm		compiler/architecture research for ILP and threads, dynamic optimization for C/C++, object oriented languages, virtual machines and just-in-time compilation dblp
Paolo Faraboschi	Hewlett-Packard Labs, Cambridge		embedded computers, custom-fit processors dblp
Keith I. Farkas	Hewlett Packard WRL research.compaq.com/wrl/people/farkas/bio.html		low power, processor architecture, memory system performance dblp
Matthew K. Farrens	Professor UC Davis, CS huron.cs.ucdavis.edu/~farrens		architecture and design of high-performance single-chip processors dblp
Stuart Feldman	Director IBM Institute for Advanced Commerce research.ibm.com/iac/advisory-feldman.html		software engineering, programming languages, scientific computing, make dblp
Edward W. Felten	Professor Princeton U, CS cs.princeton.edu/~felten		secure internet programming, SHRIMP multicomputer dblp
Jeanne Ferrante	Professor UC San Diego www-cse.ucsd.edu/users/ferrante		SSA, predicated execution, compiler optimizations dblp
John Field	Research staff IBM Research research.ibm.com/people/j/jfield		program understanding and analysis tools, algorithms for program analysis, logics of programs, term- and graph-rewriting, program slicing, compiler optimization, incremental algorithms dblp
Tony Field	Senior Lecturer and Teaching Fellow Imperial College, UK doc.ic.ac.uk/~ajf		performance modelling of computer software and hardware, software performance optimisation, particle-based simulation of microbiological systems, discrete-event simulation, functional programming languages, compilers and run-time systems dblp
Robert Bruce Findler	Professor U of Chicago cs.uchicago.edu/people/robby		programming languages, DrScheme, software contracts dblp
Ulrich Finger	Director Institut Eurecom, France eurecom.fr/Resources/Direction/finger.html		parallel processing, parallel computer architecture dblp
Alan M. Finn	United Technologies Research Center users.erols.com/alanfinn		computer architecture with emphasis on embedded systems dblp
Charles N. Fischer	Professor U of Wisconsin-Madison, CS cs.wisc.edu/~fischer/fischer.html		compilers, register allocation dblp
Joseph A. Fisher	Hewlett-Packard Labs, Cambridge hpl.hp.com/about/bios/josh_fisher.html Eckert-Mauchly (2003) award		ILP, branch prediction, VLIW, trace scheduling dblp
Kathleen Fisher	AT&T Research research.att.com/info/kfisher		domain-specific programming languages, Moby, PADS, Hancock dblp
Cormac Flanagan	Professor UC Santa Cruz CS soe.ucsc.edu/~cormac		software engineering, validation, defect detection dblp
Matthew Flatt	Professor U of Utah CS cs.utah.edu/~mflatt		programming languages, DrScheme, object-oriented programming, high-level operating systems dblp
Michael J. Flynn	Professor (emeritus) Stanford U umunhum.stanford.edu/~flynn Eckert-Mauchly (1992) award		computer architecture dblp
José A. B. Fortes	Professor U of Florida acis.ufl.edu/fortes		parallel processing, computer architecture, network-computing, fault-tolerant computing dblp
Jeff P. Foster	Professor U of Maryland, CS cs.umd.edu/~jfoster		tools and techniques to improve software quality, cqual dblp
Matthew Frank	Professor U of Illinois at Urbana-Champaign, ECE ece.uiuc.edu/faculty/faculty.asp?mif		parallelization of programs with statically unpredictable dependencies, RAW dblp
Michael P. Frank	Professor U of Florida ECE cise.ufl.edu/~mpf		low-power computing, reversible computing, adiabatic circuits, reversible languages dblp
Manoj Franklin	Professor U of Maryland ece.umd.edu/~manoj		computer architecture especially ILP, compiling for ILP machines, memory systems dblp
Mark A. Franklin	Professor Washington U in St. Louis ccrc.wustl.edu/~jbf		computer architecture, parallel processing, systems performance evaluation, VLSI design dblp
Michael Franz	Professor UC Irvine ics.uci.edu/~franz		security and efficiency of mobile code, code compression, dynamic compilation, compiling for low-power dblp
Paul Franzon	Professor North Carolina State U, ECE ece.ncsu.edu/erl/faculty/paulf.html		high speed packaging and interconnect, high speed and low power chip design, micro electro mechanical machines, wafer-scale integration, IC yield modeling, VLSI chip design, communications systems design, molecular computers dblp
Christopher W. Fraser	Microsoft Research research.microsoft.com/~cwfraser/		code compression, code generation, editors dblp
Eby G. Friedman	Professor U of Rochester, EE ee.rochester.edu/users/friedman		VLSI circuits and systems, CMOS circuits, synchronization, clock distribution, pipelining, speed/power/area tradeoffs dblp
Jason Fritts	Professor Washington U in St. Louis ccrc.wustl.edu/~jefritts		media processors, embedded systems, ubiquitous computing, computer architecture, parallel processing, video and image processing dblp
W. Kent Fuchs	Professor Cornell U, ECE composer.ecn.purdue.edu/~fuchs (old)		dependable computer systems, testing and fault diagnosis of VLSI IC dblp
Donald S. Fussell	Professor U of Texas, Austin, CS cs.utexas.edu/users/fussell		computer architecture, computer graphics, database systems, design automation, fault-tolerant computing dblp