Explanation.
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Name | Address | Picture | Work |
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F. Kenneth Zadeck |
Founder, Chief Technology Officer NaturalBridge |
program analysis, SSA, optimizing compilers dblp | |
Mohamed M. Zahran |
Professor City U of New York mzahran.com |
microarchitecture of multithreaded processors, power-aware architecture, high performance memory hierarchy dblp | |
Safwat G. Zaky |
Professor U of Toronto, EE, Canada eecg.utoronto.ca/~safwat |
computer architecture and hardware, digital circuit design, computer communication, digital switching and LANs, environmental awareness dblp | |
Andreas Zeller |
Professor U des Saarlandes, Germany st.cs.uni-sb.de/~zeller/ |
automated debugging, self-healing programs, software evolution, experimental program analysis, exploit generation dblp | |
Antonia Zhai |
Professor U of Minnesota www2.itdean.umn.edu/faculty/detail.jsp?facultyID=503 |
compiler optimizations, computer architecture dblp | |
Lintao Zhang |
Microsoft Research research.microsoft.com/users/lintaoz |
formal verification, SAT solvers, Chaff dblp | |
Wei Zhang |
Professor Southern Illinois U, Carbondale ECE howard.engr.siu.edu/~zhang/ |
computer architecture, compilers, hardware/software co-design for embedded systems dblp | |
Xiaodong Zhang |
Professor College of William and Mary, CS cs.wm.edu/~zhang |
memory performance improvement, memory-centric resource management, cluster computing dblp | |
Youtao Zhang |
Professor U of Texas Dallas utdallas.edu/~yxz028100 |
secure systems, program analysis, profiling and code optimization, computer architecture, embedded systems dblp | |
Zhao Zhang |
Professor Iowa State U ECE clue.eng.iastate.edu/~zzhang |
high performance computer architecture, parallel and distributed computing, architectural support for security dblp | |
Xudong Zhao |
staff engineer Strategic CAD Labs, Intel |
formal verification for hardware and arithmetic circuits
dblp | |
Peixin Zhong |
Professor Michigan State U ECE egr.msu.edu/~pzhong |
VLSI, computer architecture, adaptable system-on-chip dblp | |
Dian Zhou |
Professor U of Texas at Dallas utdallas.edu/~zhoud |
VLSI, CAD tools, circuits and systems dblp | |
Hai Zhou |
Professor Northwestern U ECE ece.northwestern.edu/~haizhou |
VLSI CAD, algorithm design, formal methods dblp | |
Huiyang Zhou |
Professor U of Central Florida CS cs.ucf.edu/~zhou/ |
computer architecture, high-performance/low-power/DSP, back-end compiler design, code optimization, embedded systems dblp | |
Yuanyuan Zhou |
Professor U of Illinois at Urbana-Champaign CS www-faculty.cs.uiuc.edu/~yyzhou |
operating systems, file and storage systems, computer architecture, distributed systems, parallel systems, system support for databases dblp | |
Jianwen Zhu |
Professor U of Toronto, EE, Canada eecg.toronto.edu/~jzhu |
computer aided design for digital IC, synthesis, OpenJ dblp | |
Sotirios G. Ziavras |
Professor New Jersey Institute of Technology megahertz.njit.edu/~ziavras |
computer architecture, parallel processing and supercomputing dblp | |
Craig B. Zilles |
Professor U of Illinois at Urbana-Champaign, CS www-faculty.cs.uiuc.edu/~zilles |
dynamic program slicing, prediction dblp | |
Hans P. Zima |
Professor U of Vienna, Austria par.univie.ac.at/~zima |
parallel computation, HPF+, object-based distributed programming for massively parallel arrays of processor-in-memory systems dblp | |
Wolf Zimmermann |
Professor Martin-Luther U Halle-Wittenberg, Germany informatik.uni-halle.de/~zimmer |
reliable compilers, software engineering, programming languages dblp | |
Benjamin G. Zorn |
Microsoft Research research.microsoft.com/~zorn |
hybrid value predictors, garbage collection, programming languages, runtime environments dblp | |
Konrad Zuse |
(deceased) konrad-zuse.de |
first program-controlled digital computer
dblp | |
Willy Zwaenepoel |
Professor Rice U, CS cs.rice.edu/~willy |
DSM, Munin, Threadmarks, ScalaServer, Puppeteer dblp | |
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