Researchers in Computer Architecture and Compilers

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Name	Address	Picture	Work
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Jan M. Rabaey	Professor UC Berkeley, EE bwrc.eecs.berkeley.edu/People/Faculty/jan		digital integrated circuits, low-power design dblp
Sriram K. Rajamani	Microsoft Research research.microsoft.com/~sriram		model checking, static analyses, SLAM dblp
Ryan Rakvic	Intel ece.cmu.edu/~rnr (old)		memory hierarchy optimizations dblp
Umakishore Ramachandran	Professor Georgia Tech U, CS cc.gatech.edu/~rama		Clouds, Beehive, Stampede dblp
G. Ramalingam	IBM T. J. Watson research.ibm.com/people/r/rama/		static analysis, compilers dblp
C. V. Ramamoorthy	Professor (emeritus) UC Berkeley, CS cs.berkeley.edu/People/Faculty/Homepages/ramamoorthy.html		distributed systems, Petri nets, software engineering, databases dblp
J. Ramanujam	Professor Louisiana State U ece.lsu.edu/jxr		compiler optimizations, embedded systems, low-power computing, high performance computing, hardware synthesis, configurable computing, computer architecture, operating systems, distributed systems dblp
Alex Ramirez	Professor U Politecnica de Catalunya, Barcelona, Spain people.ac.upc.es/aramirez		fetch engine performance, commercial workloads, compiler optimizations, binary translation, architecture simulation dblp
Norman Ramsey	Professor Harvard U eecs.harvard.edu/~nr		C--, SLED, Zephyr, retargetable debugger, noweb (literate programming) dblp
Nagarajan Ranganathan	Professor U of South Florida vcapp.csee.usf.edu/~ranganat		VLSI Algorithms and architectures, application specific VLSI system design, VLSI design automation, data compression, VLSI for image/video/signal processing, computer architecture and parallel computing dblp
Parthasarathy Ranganathan	Hewlett Packard WRL research.compaq.com/wrl/people/parthas/bio.html		computer architecture, parallel computing, performance evaluation, low-power system design dblp
Srikantam Sai Surya Prakasa Rao	Professor Indian Institute of Technology, Bombay, India cse.iitb.ac.in/~ssspr/personal.html		VLSI Design, computer architecture, reconfigurable computing, microprocessor design and interfaces dblp
Justin R. Rattner	director Microprocessor Research, Intel intel.com/pressroom/kits/bios/jrattner.htm		ASCII Red, advanced circuits, microarchitecture, architecture dblp
Bob Ramakrishna Rau	(deceased) Hewlett-Packard Labs trimaran.org/car_group/bob_rau.html Eckert-Mauchly (2002) award		VLIW, EPIC, Elcor, Trimaran, PICO, rotating register files, Cydra 5 dblp
Lawrence Rauchwerger	Professor Texas A&M U, CS cs.tamu.edu/faculty/rwerger		speculative parallelization, Polaris dblp
Daniel A. Reed	Professor U of Illinois at Urbana-Champaign, CS www-pablo.cs.uiuc.edu/People/Reed/DanReed.htm		performance analysis techniques and resource management for parallel systems dblp
John Regehr	Professor U of Utah, CS cs.utah.edu/~regehr		embedded systems dblp
Jakob Rehof	Microsoft Research research.microsoft.com/~rehof		type systems, type inference, model checking and type systems for concurrent programs, static program analysis, program logics, complexity and scalability of program analyses dblp
Steven K. Reinhardt	Professor U of Michigan eecs.umich.edu/~stever		computer architecture, parallel and distributed systems, operating systems, computer system simulation dblp
Glenn Reinman	Professor UC Los Angeles cs.ucla.edu/~reinman		computer architecture, ILP, speculative execution, branch prediction and fetch architectures, cache design and prefetching, CACTI, scalable architectures dblp
Didier Rémy	Researcher INRIA Rocquencourt, France pauillac.inria.fr/~remy/		type systems and type inference, object oriented languages, concurrent and distributed languages, semantics of programming languages, Ocaml, Join dblp
Jose Renau	Professor UC Santa Cruz coe.ucsc.edu/~renau		energy/performance trade-offs, thread level speculation, simulation tools, FPGAs, complexity dblp
John H. Reppy	Professor U of Chicago people.cs.uchicago.edu/~jhr		design and implementation of advanced programming languages, Moby, SML/NJ dblp
Thomas W. Reps	Professor U of Wisconsin-Madison, CS cs.wisc.edu/~reps/reps.html		program slicing, shape analysis, model checking dblp
John C. Reynolds	Professor Carnegie Mellon U, CS cs.cmu.edu/~jcr		design of programming languages, semantics of programming languages, methods for proving that programs meet specifications dblp
Laura Ricci	Professor U of Pisa, Italy di.unipi.it/~ricci		compilation and modelling of HPC, parallelization of irregular applications, static analysis dblp
Martin C. Rinard	Professor MIT cag.lcs.mit.edu/~rinard		commutativity analysis, compilers, multithreaded program analysis dblp
Dennis M. Ritchie	Bell Labs, Lucent cm.bell-labs.com/cm/cs/who/dmr Turing (1983) award		C, Unix dblp
Scott Rixner	Professor Rice U, CS cs.rice.edu/~rixner		microprocessor architecture, media and network processing, VLSI and computer architectures, memory system architecture dblp
Davide Rizzo	ST Microelectronics		architectural support for multimedia dblp
Anne Rogers	Prfessor U of Chicago, CS people.cs.uchicago.edu/~amr		compilers, Olden, parallel programming dblp
Ronny Ronen	Israel Microarchitecture Lab Director Intel intel.com/research/mrl/people/ronen_r.htm		microprocessor architecture and microarchitecture, compilers dblp
Jonathan Rose	Professor U of Toronto, EE, Canada eecg.utoronto.ca/~jayar		FPGAs architecture, CAD, Field-Programmable Systems, graphics and vision applications on FPGAs dblp
Mendel Rosenblum	Professor Stanford U/Vmware simos.stanford.edu/~mendel		SimOS, FLASH, Hive, Disco, log-structured filesystem dblp
Guido van Rossum	Elemental Security python.org/~guido		Python, Amoeba, hypermedia dblp
Grigore Rosu	Professor U of Illinois at Urbana-Champaign, CS gureni.cs.uiuc.edu/~grosu		design/semantics/implementation of programming and specification languages, certification/monitoring/synthesis/modularization, automated reasoning, algorithms, category theory dblp
Eric Rotenberg	Professor North Carolina State U, ECE tinker.ncsu.edu/ericro		Trace cache, Slipstream processors dblp
Amir Roth	Professor U of Pennsylvania cis.upenn.edu/~amir		multithreaded processors, prediction dblp
Jerry Roth	Professor Gonzaga U cps.gonzaga.edu/~roth		optimizing compiler technology for scalar and parallel architectures dblp
Kaushik Roy	Professor Purdue U, ECE dynamo.ecn.purdue.edu/~kaushik		low power VLSI dblp
Elizabeth M. Rudnick	Professor U of Illinois Urbana-Champaign, ECE crhc.uiuc.edu/~liz		design verification, test generation, fault simulation, design for testability, fault diagnosis, VLSI system design, electronic design automation dblp
Larry Rudolph	professor MIT csg.lcs.mit.edu/~rudolph		starT, parallel computation, Oxygen dblp
Erik Ruf	Microsoft Research research.microsoft.com/~ruf		design and implementation of programming languages, Bartok, AST toolkit dblp
Radu Rugina	Professor Cornell U, CS cs.cornell.edu/People/rugina		multithreaded prog. pointer analysis, automatic paralellization dblp
Rob A. Rutenbar	Professor Carnegie Mellon U, ECE ece.cmu.edu/~rutenbar		custom analog circuit CAD, high-performance digital ICs and CAD dblp
Oliver Rüthing	post doc (old) U of Dortmund, Germany ls5-www.cs.uni-dortmund.de/~ruething		static analysis, lazy code motion dblp
Barbara G. Ryder	Professor Rutgers U, CS cs.rutgers.edu/~ryder		compile-time program analyses, tools for program understanding/testing/maintenance, optimization of object-oriented programs, static and dynamic program analyses in server systems dblp